深圳市桑尼奇科技有限公司

GL857L

USB 2.0 Hub Reader Controller

GL857L的功能

General § 3 downstream ports of USB2.0 Hub with SD Card Reader § Integrated USB transceiver § Built-in upstream 1.5KΩ pull-up and downstream 15KΩ pull-down § Integrated 5-to-3.3 regulator and 3.3-to-1.8 regulator § 0.152um CMOS technology § On chip clock source and no external crystal needed.

Compliant to USB specification Revision 2.0 w Configurable 3/2/1 downstream ports w upstream port supports both high speed(HS) and full speed(FS) traffic w downstream ports support HS, FS, and low speed(LS) traffic w 1 control pipe(endpoint 0, 64-byte data payload) and 1 interrupt pipe(endpoint 1, 1-byte data payload) w backward compatible to USB specification Revision 1.1

Support gang modes of power management and over-current detection for downstream ports

On-chip 8-bit micro-processor

RISC-like architecture 

USB optimized instruction set w Single cycle instruction execution

Performance: 6 MIPS @ 12MHz

With 64-byte RAM and 2K mask ROM

USB specification compliance

Comply with 480Mbps Universal Serial Bus specification rev. 2.0

Comply with USB Storage Class specification rev. 1.0

 Support one device address and up to four endpoints: Control (0)/ Bulk Read (1)/ Bulk Write (2)/Interrupt(3)

Secure DigitalTM (SD) and MultiMediaCardTM (MMC)

Supports SD specification v1.0 / v1.1 / v2.0 / SDHC (Up to 32GB)

Compatible with SDXC (Up to 2TB)

Supports MMC specification v3.x / v4.0 / v4.1 / v4.2

x1 / x4 bit data bus

Support SD3.0 by 80MHz for better performance

Embedded PMOS switch for power control of card interface

GL857L的电路图

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